Multiprocessor integrated circuits (ICs) (ICs with two or more processors) typically share a common external memory bus and use common memory to save cost. These processors can inadvertently modify memory used by each other, causing system crashes.
Single processors can have memory protection units, using address segments, page tables, and/or access protection levels (Intel x86 MMU is a good example). In a typical configuration, a respective MMU is interposed between each processor and the internal memory bus. Some other implementations, (example: Agere x125) use a security block for secure boot loading, which is a static range check.
Memory protection units, such as the MMU, are complicated and require extensive software support, usually involving a large and complicated operating system. These only protect for accesses by a single processor and do not prevent accesses by the other processor. So, for example, a system having three processors would require three separate MMUs. There is no easy way to coordinate the memory protection regions between processors, especially when each processor is running its own, sometimes different, operating system, frequently authored by different suppliers.